356 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			356 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
|         ////////////////////////////////////////////////////
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|         // TFT_eSPI driver functions for ESP32 processors //
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|         ////////////////////////////////////////////////////
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| 
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| #ifndef _TFT_eSPI_ESP32H_
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| #define _TFT_eSPI_ESP32H_
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| 
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| // Processor ID reported by getSetup()
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| #define PROCESSOR_ID 0x32
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| 
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| // Include processor specific header
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| #include "soc/spi_reg.h"
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| #include "driver/spi_master.h"
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| 
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| // Processor specific code used by SPI bus transaction startWrite and endWrite functions
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| #define SET_BUS_WRITE_MODE // Not used
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| #define SET_BUS_READ_MODE  // Not used
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| 
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| // SUPPORT_TRANSACTIONS is mandatory for ESP32 so the hal mutex is toggled
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| #if !defined (SUPPORT_TRANSACTIONS)
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|   #define SUPPORT_TRANSACTIONS
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| #endif
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| 
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| // ESP32 specific SPI port selection
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| #ifdef USE_HSPI_PORT
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|   #define SPI_PORT HSPI
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| #else
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|   #define SPI_PORT VSPI
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| #endif
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| 
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| #ifdef RPI_DISPLAY_TYPE
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|   #define CMD_BITS (16-1)
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| #else
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|   #define CMD_BITS (8-1)
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| #endif
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| 
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| // Initialise processor specific SPI functions, used by init()
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| #define INIT_TFT_DATA_BUS // Not used
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| 
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| // Define a generic flag for 8 bit parallel
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| #if defined (ESP32_PARALLEL) // Specific to ESP32 for backwards compatibility
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|   #define TFT_PARALLEL_8_BIT // Generic parallel flag
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| #endif
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| 
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| 
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| // If smooth font is used then it is likely SPIFFS will be needed
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| #ifdef SMOOTH_FONT
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|   // Call up the SPIFFS (SPI FLASH Filing System) for the anti-aliased fonts
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|   #define FS_NO_GLOBALS
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|   #include <FS.h>
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|   #include "SPIFFS.h" // ESP32 only
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|   #define FONT_FS_AVAILABLE
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| #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Define the DC (TFT Data/Command or Register Select (RS))pin drive code
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #ifndef TFT_DC
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|   #define DC_C // No macro allocated so it generates no code
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|   #define DC_D // No macro allocated so it generates no code
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| #else
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|   #if defined (TFT_PARALLEL_8_BIT)
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|     #define DC_C GPIO.out_w1tc = (1 << TFT_DC)
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|     #define DC_D GPIO.out_w1ts = (1 << TFT_DC)
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|   #else
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|     #if TFT_DC >= 32
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|       #ifdef RPI_DISPLAY_TYPE  // RPi displays need a slower DC change
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|         #define DC_C GPIO.out1_w1ts.val = (1 << (TFT_DC - 32)); \
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|                      GPIO.out1_w1tc.val = (1 << (TFT_DC - 32))
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|         #define DC_D GPIO.out1_w1tc.val = (1 << (TFT_DC - 32)); \
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|                      GPIO.out1_w1ts.val = (1 << (TFT_DC - 32))
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|       #else
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|         #define DC_C GPIO.out1_w1tc.val = (1 << (TFT_DC - 32))//;GPIO.out1_w1tc.val = (1 << (TFT_DC - 32))
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|         #define DC_D GPIO.out1_w1ts.val = (1 << (TFT_DC - 32))//;GPIO.out1_w1ts.val = (1 << (TFT_DC - 32))
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|       #endif
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|     #elif TFT_DC >= 0
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|       #ifdef RPI_DISPLAY_TYPE  // RPi ILI9486 display needs a slower DC change
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|         #define DC_C GPIO.out_w1tc = (1 << TFT_DC); \
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|                      GPIO.out_w1tc = (1 << TFT_DC)
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|         #define DC_D GPIO.out_w1tc = (1 << TFT_DC); \
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|                      GPIO.out_w1ts = (1 << TFT_DC)
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|       #elif defined (RPI_DISPLAY_TYPE)  // Other RPi displays need a slower C->D change
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|         #define DC_C GPIO.out_w1tc = (1 << TFT_DC)
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|         #define DC_D GPIO.out_w1tc = (1 << TFT_DC); \
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|                      GPIO.out_w1ts = (1 << TFT_DC)
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|       #else
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|         #define DC_C GPIO.out_w1tc = (1 << TFT_DC)//;GPIO.out_w1tc = (1 << TFT_DC)
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|         #define DC_D GPIO.out_w1ts = (1 << TFT_DC)//;GPIO.out_w1ts = (1 << TFT_DC)
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|       #endif
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|     #else
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|       #define DC_C
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|       #define DC_D
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|     #endif
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|   #endif
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| #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Define the CS (TFT chip select) pin drive code
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #ifndef TFT_CS
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|   #define CS_L // No macro allocated so it generates no code
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|   #define CS_H // No macro allocated so it generates no code
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| #else
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|   #if defined (TFT_PARALLEL_8_BIT)
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|     #if TFT_CS >= 32
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|         #define CS_L GPIO.out1_w1tc.val = (1 << (TFT_CS - 32))
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|         #define CS_H GPIO.out1_w1ts.val = (1 << (TFT_CS - 32))
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|     #elif TFT_CS >= 0
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|         #define CS_L GPIO.out_w1tc = (1 << TFT_CS)
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|         #define CS_H GPIO.out_w1ts = (1 << TFT_CS)
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|     #else
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|       #define CS_L
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|       #define CS_H
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|     #endif
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|   #else
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|     #if TFT_CS >= 32
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|       #ifdef RPI_DISPLAY_TYPE  // RPi ILI9486 display needs a slower CS change
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|         #define CS_L GPIO.out1_w1ts.val = (1 << (TFT_CS - 32)); \
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|                      GPIO.out1_w1tc.val = (1 << (TFT_CS - 32))
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|         #define CS_H GPIO.out1_w1tc.val = (1 << (TFT_CS - 32)); \
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|                      GPIO.out1_w1ts.val = (1 << (TFT_CS - 32))
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|       #else
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|         #define CS_L GPIO.out1_w1tc.val = (1 << (TFT_CS - 32)); GPIO.out1_w1tc.val = (1 << (TFT_CS - 32))
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|         #define CS_H GPIO.out1_w1ts.val = (1 << (TFT_CS - 32))//;GPIO.out1_w1ts.val = (1 << (TFT_CS - 32))
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|       #endif
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|     #elif TFT_CS >= 0
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|       #ifdef RPI_DISPLAY_TYPE  // RPi ILI9486 display needs a slower CS change
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|         #define CS_L GPIO.out_w1ts = (1 << TFT_CS); GPIO.out_w1tc = (1 << TFT_CS)
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|         #define CS_H GPIO.out_w1tc = (1 << TFT_CS); GPIO.out_w1ts = (1 << TFT_CS)
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|       #else
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|         #define CS_L GPIO.out_w1tc = (1 << TFT_CS);GPIO.out_w1tc = (1 << TFT_CS)
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|         #define CS_H GPIO.out_w1ts = (1 << TFT_CS)//;GPIO.out_w1ts = (1 << TFT_CS)
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|       #endif
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|     #else
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|       #define CS_L
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|       #define CS_H
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|     #endif
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|   #endif
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| #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Define the WR (TFT Write) pin drive code
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #ifdef TFT_WR
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|   #define WR_L GPIO.out_w1tc = (1 << TFT_WR)
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|   #define WR_H GPIO.out_w1ts = (1 << TFT_WR)
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| #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Define the touch screen chip select pin drive code
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #ifndef TOUCH_CS
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|   #define T_CS_L // No macro allocated so it generates no code
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|   #define T_CS_H // No macro allocated so it generates no code
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| #else // XPT2046 is slow, so use slower digitalWrite here
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|   #define T_CS_L digitalWrite(TOUCH_CS, LOW)
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|   #define T_CS_H digitalWrite(TOUCH_CS, HIGH)
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| #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Make sure TFT_MISO is defined if not used to avoid an error message
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #if !defined (TFT_PARALLEL_8_BIT)
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|   #ifndef TFT_MISO
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|     #define TFT_MISO -1
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|   #endif
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| #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Define the parallel bus interface chip pin drive code
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #if defined (TFT_PARALLEL_8_BIT)
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| 
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|   // Create a bit set lookup table for data bus - wastes 1kbyte of RAM but speeds things up dramatically
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|   // can then use e.g. GPIO.out_w1ts = set_mask(0xFF); to set data bus to 0xFF
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|   #define CONSTRUCTOR_INIT_TFT_DATA_BUS            \
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|   for (int32_t c = 0; c<256; c++)                  \
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|   {                                                \
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|     xset_mask[c] = 0;                              \
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|     if ( c & 0x01 ) xset_mask[c] |= (1 << TFT_D0); \
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|     if ( c & 0x02 ) xset_mask[c] |= (1 << TFT_D1); \
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|     if ( c & 0x04 ) xset_mask[c] |= (1 << TFT_D2); \
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|     if ( c & 0x08 ) xset_mask[c] |= (1 << TFT_D3); \
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|     if ( c & 0x10 ) xset_mask[c] |= (1 << TFT_D4); \
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|     if ( c & 0x20 ) xset_mask[c] |= (1 << TFT_D5); \
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|     if ( c & 0x40 ) xset_mask[c] |= (1 << TFT_D6); \
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|     if ( c & 0x80 ) xset_mask[c] |= (1 << TFT_D7); \
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|   }                                                \
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| 
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|   // Mask for the 8 data bits to set pin directions
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|   #define dir_mask ((1 << TFT_D0) | (1 << TFT_D1) | (1 << TFT_D2) | (1 << TFT_D3) | (1 << TFT_D4) | (1 << TFT_D5) | (1 << TFT_D6) | (1 << TFT_D7))
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| 
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|   // Data bits and the write line are cleared to 0 in one step
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|   #define clr_mask (dir_mask | (1 << TFT_WR))
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| 
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|   // A lookup table is used to set the different bit patterns, this uses 1kByte of RAM
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|   #define set_mask(C) xset_mask[C] // 63fps Sprite rendering test 33% faster, graphicstest only 1.8% faster than shifting in real time
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| 
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|   // Real-time shifting alternative to above to save 1KByte RAM, 47 fps Sprite rendering test
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|   /*#define set_mask(C) (((C)&0x80)>>7)<<TFT_D7 | (((C)&0x40)>>6)<<TFT_D6 | (((C)&0x20)>>5)<<TFT_D5 | (((C)&0x10)>>4)<<TFT_D4 | \
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|                         (((C)&0x08)>>3)<<TFT_D3 | (((C)&0x04)>>2)<<TFT_D2 | (((C)&0x02)>>1)<<TFT_D1 | (((C)&0x01)>>0)<<TFT_D0
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|   //*/
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| 
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|   // Write 8 bits to TFT
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|   #define tft_Write_8(C)  GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t)(C)); WR_H
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| 
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|   // Write 16 bits to TFT
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|   #define tft_Write_16(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t)((C) >> 8)); WR_H; \
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|                           GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t)((C) >> 0)); WR_H
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| 
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|   // 16 bit write with swapped bytes
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|   #define tft_Write_16S(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \
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|                            GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H
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| 
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|   // Write 32 bits to TFT
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|   #define tft_Write_32(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 24)); WR_H; \
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|                           GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 16)); WR_H; \
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|                           GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >>  8)); WR_H; \
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|                           GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >>  0)); WR_H
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| 
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|   // Write two concatenated 16 bit values to TFT
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|   #define tft_Write_32C(C,D) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
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|                              GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \
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|                              GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 8)); WR_H; \
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|                              GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 0)); WR_H
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| 
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|   // Write 16 bit value twice to TFT - used by drawPixel()
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|   #define tft_Write_32D(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
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|                            GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \
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|                            GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
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|                            GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H
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| 
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|    // Read pin
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|   #ifdef TFT_RD
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|     #define RD_L GPIO.out_w1tc = (1 << TFT_RD)
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|     //#define RD_L digitalWrite(TFT_WR, LOW)
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|     #define RD_H GPIO.out_w1ts = (1 << TFT_RD)
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|     //#define RD_H digitalWrite(TFT_WR, HIGH)
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|   #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Macros to write commands/pixel colour data to an ILI9488 TFT
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #elif  defined (ILI9488_DRIVER) // 16 bit colour converted to 3 bytes for 18 bit RGB
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| 
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|   // Write 8 bits to TFT
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|   #define tft_Write_8(C)   spi.transfer(C)
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| 
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|   // Convert 16 bit colour to 18 bit and write in 3 bytes
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|   #define tft_Write_16(C)  spi.transfer(((C) & 0xF800)>>8); \
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|                            spi.transfer(((C) & 0x07E0)>>3); \
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|                            spi.transfer(((C) & 0x001F)<<3)
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| 
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|   // Convert swapped byte 16 bit colour to 18 bit and write in 3 bytes
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|   #define tft_Write_16S(C) spi.transfer((C) & 0xF8); \
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|                            spi.transfer(((C) & 0xE000)>>11 | ((C) & 0x07)<<5); \
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|                            spi.transfer(((C) & 0x1F00)>>5)
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| 
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|   // Write 32 bits to TFT
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|   #define tft_Write_32(C)  spi.write32(C)
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| 
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|   // Write two concatenated 16 bit values to TFT
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|   #define tft_Write_32C(C,D) spi.write32((C)<<16 | (D))
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| 
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|   // Write 16 bit value twice to TFT
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|   #define tft_Write_32D(C)  spi.write32((C)<<16 | (C))
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Macros to write commands/pixel colour data to an Raspberry Pi TFT
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #elif  defined (RPI_DISPLAY_TYPE)
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| 
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|   // ESP32 low level SPI writes for 8, 16 and 32 bit values
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|   // to avoid the function call overhead
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|   #define TFT_WRITE_BITS(D, B) \
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|   WRITE_PERI_REG(SPI_MOSI_DLEN_REG(SPI_PORT), B-1); \
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|   WRITE_PERI_REG(SPI_W0_REG(SPI_PORT), D); \
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|   SET_PERI_REG_MASK(SPI_CMD_REG(SPI_PORT), SPI_USR); \
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|   while (READ_PERI_REG(SPI_CMD_REG(SPI_PORT))&SPI_USR);
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| 
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|   // Write 8 bits
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|   #define tft_Write_8(C) TFT_WRITE_BITS((C)<<8, 16)
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| 
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|   // Write 16 bits with corrected endianess for 16 bit colours
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|   #define tft_Write_16(C) TFT_WRITE_BITS((C)<<8 | (C)>>8, 16)
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| 
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|   // Write 16 bits
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|   #define tft_Write_16S(C) TFT_WRITE_BITS(C, 16)
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| 
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|   // Write 32 bits
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|   #define tft_Write_32(C) TFT_WRITE_BITS(C, 32)
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| 
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|   // Write two address coordinates
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|   #define tft_Write_32C(C,D)  TFT_WRITE_BITS((C)<<24 | (C), 32); \
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|                               TFT_WRITE_BITS((D)<<24 | (D), 32)
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| 
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|   // Write same value twice
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|   #define tft_Write_32D(C) tft_Write_32C(C,C)
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Macros for all other SPI displays
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #else
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| 
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|   #define ESP32_DMA // DMA is available for SPI
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| 
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|   // Code to check if DMA is busy, used by SPI bus transaction transaction and endWrite functions
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|   #ifdef ESP32_DMA
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|     // Code to check if DMA is busy, used by SPI DMA + transaction + endWrite functions
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|     #define DMA_BUSY_CHECK  { if (spiBusyCheck) dmaWait(); }
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|   #else
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|     #define DMA_BUSY_CHECK
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|   #endif
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| 
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|   // ESP32 low level SPI writes for 8, 16 and 32 bit values
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|   // to avoid the function call overhead
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|   #define TFT_WRITE_BITS(D, B) \
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|   WRITE_PERI_REG(SPI_MOSI_DLEN_REG(SPI_PORT), B-1); \
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|   WRITE_PERI_REG(SPI_W0_REG(SPI_PORT), D); \
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|   SET_PERI_REG_MASK(SPI_CMD_REG(SPI_PORT), SPI_USR); \
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|   while (READ_PERI_REG(SPI_CMD_REG(SPI_PORT))&SPI_USR);
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| 
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|   // Write 8 bits
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|   #define tft_Write_8(C) TFT_WRITE_BITS(C, 8)
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| 
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|   // Write 16 bits with corrected endianess for 16 bit colours
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|   #define tft_Write_16(C) TFT_WRITE_BITS((C)<<8 | (C)>>8, 16)
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| 
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|   // Write 16 bits
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|   #define tft_Write_16S(C) TFT_WRITE_BITS(C, 16)
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| 
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|   // Write 32 bits
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|   #define tft_Write_32(C) TFT_WRITE_BITS(C, 32)
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| 
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|   // Write two address coordinates
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|   #define tft_Write_32C(C,D)  TFT_WRITE_BITS((uint16_t)((D)<<8 | (D)>>8)<<16 | (uint16_t)((C)<<8 | (C)>>8), 32)
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| 
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|   // Write same value twice
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|   #define tft_Write_32D(C) TFT_WRITE_BITS((uint16_t)((C)<<8 | (C)>>8)<<16 | (uint16_t)((C)<<8 | (C)>>8), 32)
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| 
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| #endif
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| 
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| ////////////////////////////////////////////////////////////////////////////////////////
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| // Macros to read from display using SPI or software SPI
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| ////////////////////////////////////////////////////////////////////////////////////////
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| #if !defined (TFT_PARALLEL_8_BIT)
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|   // Read from display using SPI or software SPI
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|   // Use a SPI read transfer
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|   #define tft_Read_8() spi.transfer(0)
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| #endif
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| 
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| // Concatenate a byte sequence A,B,C,D to CDAB, P is a uint8_t pointer
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| #define DAT8TO32(P) ( (uint32_t)P[0]<<8 | P[1] | P[2]<<24 | P[3]<<16 )
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| 
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| #endif // Header end
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