439 lines
17 KiB
C
439 lines
17 KiB
C
////////////////////////////////////////////////////
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// TFT_eSPI generic driver functions //
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////////////////////////////////////////////////////
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// This is a generic driver for Arduino boards, it supports SPI interface displays
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// 8 bit parallel interface to TFT is not supported for generic processors
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#ifndef _TFT_eSPI_RP2040H_
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#define _TFT_eSPI_RP2040H_
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#ifndef ARDUINO_ARCH_MBED
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#include <LittleFS.h>
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#define FONT_FS_AVAILABLE
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#define SPIFFS LittleFS
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#endif
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// Required for both the official and community board packages
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#include "hardware/dma.h"
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#include "hardware/pio.h"
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#include "hardware/clocks.h"
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// Processor ID reported by getSetup()
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#define PROCESSOR_ID 0x2040
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// Transactions always supported
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#ifndef SUPPORT_TRANSACTIONS
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#define SUPPORT_TRANSACTIONS
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#endif
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// Include processor specific header
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// None
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#if defined (TFT_PARALLEL_8_BIT) || defined (RP2040_PIO_SPI)
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#define RP2040_PIO_INTERFACE
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#define RP2040_PIO_PUSHBLOCK
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#endif
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#if !defined (RP2040_PIO_INTERFACE)// SPI
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// Use SPI0 as default if not defined
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#ifndef TFT_SPI_PORT
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#define TFT_SPI_PORT 0
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#endif
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#if (TFT_SPI_PORT == 0)
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#define SPI_X spi0
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#else
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#define SPI_X spi1
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#endif
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// Processor specific code used by SPI bus transaction begin/end_tft_write functions
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#define SET_BUS_WRITE_MODE spi_set_format(SPI_X, 8, (spi_cpol_t)(TFT_SPI_MODE >> 1), (spi_cpha_t)(TFT_SPI_MODE & 0x1), SPI_MSB_FIRST)
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#define SET_BUS_READ_MODE // spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST)
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#else
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// Processor specific code used by SPI bus transaction begin/end_tft_write functions
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#define SET_BUS_WRITE_MODE
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#define SET_BUS_READ_MODE
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#endif
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// Code to check if SPI or DMA is busy, used by SPI bus transaction startWrite and/or endWrite functions
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#if !defined(SPI_18BIT_DRIVER)
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#define RP2040_DMA
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// Code to check if DMA is busy, used by SPI DMA + transaction + endWrite functions
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#define DMA_BUSY_CHECK dmaWait()
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#else
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#define DMA_BUSY_CHECK
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#endif
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#if !defined (RP2040_PIO_INTERFACE) // SPI
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// Initialise processor specific SPI functions, used by init()
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#define INIT_TFT_DATA_BUS // Not used
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// Wait for tx to end, flush rx FIFO, clear rx overrun
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#define SPI_BUSY_CHECK while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
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while (spi_is_readable(SPI_X)) (void)spi_get_hw(SPI_X)->dr; \
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spi_get_hw(SPI_X)->icr = SPI_SSPICR_RORIC_BITS
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// To be safe, SUPPORT_TRANSACTIONS is assumed mandatory
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#if !defined (SUPPORT_TRANSACTIONS)
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#define SUPPORT_TRANSACTIONS
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#endif
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#else
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// ILI9481 needs a slower cycle time
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// Byte rate = (CPU clock/(4 * divider))
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#ifdef ILI9481_DRIVER
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#define DIV_UNITS 1
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#define DIV_FRACT 160
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#else
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#define DIV_UNITS 1
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#define DIV_FRACT 0
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#endif
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// Initialise TFT data bus
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#if defined (TFT_PARALLEL_8_BIT)
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#define INIT_TFT_DATA_BUS pioinit(DIV_UNITS, DIV_FRACT);
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#elif defined (RP2040_PIO_SPI)
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#define INIT_TFT_DATA_BUS pioinit(SPI_FREQUENCY);
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#endif
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#define SPI_BUSY_CHECK
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// Set the state machine clock divider (from integer and fractional parts - 16:8)
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#define PARALLEL_INIT_TFT_DATA_BUS // Not used
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#endif
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// If smooth fonts are enabled the filing system may need to be loaded
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#if defined (SMOOTH_FONT) && !defined (ARDUINO_ARCH_MBED)
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// Call up the filing system for the anti-aliased fonts
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//#define FS_NO_GLOBALS
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#include <FS.h>
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Define the DC (TFT Data/Command or Register Select (RS))pin drive code
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////////////////////////////////////////////////////////////////////////////////////////
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#ifndef TFT_DC
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#define DC_C // No macro allocated so it generates no code
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#define DC_D // No macro allocated so it generates no code
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#else
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#if !defined (RP2040_PIO_INTERFACE)// SPI
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//#define DC_C sio_hw->gpio_clr = (1ul << TFT_DC)
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//#define DC_D sio_hw->gpio_set = (1ul << TFT_DC)
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#if defined (RPI_DISPLAY_TYPE)
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#define DC_C digitalWrite(TFT_DC, LOW);
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#define DC_D digitalWrite(TFT_DC, HIGH);
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#else
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#define DC_C sio_hw->gpio_clr = (1ul << TFT_DC)
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#define DC_D sio_hw->gpio_set = (1ul << TFT_DC)
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#endif
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#else
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// PIO takes control of TFT_DC
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// Must wait for data to flush through before changing DC line
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#define DC_C WAIT_FOR_STALL; \
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tft_pio->sm[pio_sm].instr = pio_instr_clr_dc
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// Flush has happened before this and mode changed back to 16 bit
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#define DC_D tft_pio->sm[pio_sm].instr = pio_instr_set_dc
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#endif
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Define the CS (TFT chip select) pin drive code
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////////////////////////////////////////////////////////////////////////////////////////
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#ifndef TFT_CS
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#define CS_L // No macro allocated so it generates no code
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#define CS_H // No macro allocated so it generates no code
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#else
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#if !defined (RP2040_PIO_INTERFACE) // SPI
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#if defined (RPI_DISPLAY_TYPE)
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#define CS_L digitalWrite(TFT_CS, LOW);
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#define CS_H digitalWrite(TFT_CS, HIGH);
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#else
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#define CS_L sio_hw->gpio_clr = (1ul << TFT_CS)
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#define CS_H sio_hw->gpio_set = (1ul << TFT_CS)
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#endif
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#else // PIO interface display
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#define CS_L sio_hw->gpio_clr = (1ul << TFT_CS)
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#define CS_H WAIT_FOR_STALL; sio_hw->gpio_set = (1ul << TFT_CS)
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#endif
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Make sure TFT_RD is defined if not used to avoid an error message
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////////////////////////////////////////////////////////////////////////////////////////
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// At the moment read is not supported for parallel mode, tie TFT signal high
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#ifdef TFT_RD
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#if (TFT_RD >= 0)
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#define RD_L sio_hw->gpio_clr = (1ul << TFT_RD)
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//#define RD_L digitalWrite(TFT_WR, LOW)
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#define RD_H sio_hw->gpio_set = (1ul << TFT_RD)
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//#define RD_H digitalWrite(TFT_WR, HIGH)
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#else
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#define RD_L
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#define RD_H
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#endif
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#else
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#define TFT_RD -1
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#define RD_L
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#define RD_H
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Define the WR (TFT Write) pin drive code
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////////////////////////////////////////////////////////////////////////////////////////
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#if !defined (TFT_PARALLEL_8_BIT) // SPI
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#ifdef TFT_WR
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#define WR_L digitalWrite(TFT_WR, LOW)
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#define WR_H digitalWrite(TFT_WR, HIGH)
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#endif
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#else
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// The PIO manages the write line
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Define the touch screen chip select pin drive code
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////////////////////////////////////////////////////////////////////////////////////////
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#if !defined (RP2040_PIO_INTERFACE)// SPI
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#if !defined TOUCH_CS || (TOUCH_CS < 0)
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#define T_CS_L // No macro allocated so it generates no code
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#define T_CS_H // No macro allocated so it generates no code
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#else
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#define T_CS_L digitalWrite(TOUCH_CS, LOW)
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#define T_CS_H digitalWrite(TOUCH_CS, HIGH)
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#endif
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#else
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#ifdef TOUCH_CS
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#error Touch screen not supported in parallel or SPI PIO mode, use a separate library.
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#endif
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Make sure TFT_MISO is defined if not used to avoid an error message
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////////////////////////////////////////////////////////////////////////////////////////
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#ifndef TFT_MISO
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#define TFT_MISO -1
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Macros to write commands/pixel colour data to a SPI ILI948x TFT
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////////////////////////////////////////////////////////////////////////////////////////
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#if !defined (RP2040_PIO_INTERFACE) // SPI
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#if defined (SPI_18BIT_DRIVER) // SPI 18 bit colour
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// Write 8 bits to TFT
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#define tft_Write_8(C) spi_get_hw(SPI_X)->dr = (uint32_t)(C); \
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while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
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//#define tft_Write_8(C) spi.transfer(C);
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#define tft_Write_8N(B) while (!spi_is_writable(SPI_X)){}; \
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spi_get_hw(SPI_X)->dr = (uint8_t)(B)
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// Convert 16 bit colour to 18 bit and write in 3 bytes
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#define tft_Write_16(C) tft_Write_8N(((C) & 0xF800)>>8); \
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tft_Write_8N(((C) & 0x07E0)>>3); \
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tft_Write_8N(((C) & 0x001F)<<3)
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// Convert 16 bit colour to 18 bit and write in 3 bytes
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#define tft_Write_16N(C) tft_Write_8N(((C) & 0xF800)>>8); \
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tft_Write_8N(((C) & 0x07E0)>>3); \
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tft_Write_8N(((C) & 0x001F)<<3)
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// Convert swapped byte 16 bit colour to 18 bit and write in 3 bytes
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#define tft_Write_16S(C) tft_Write_8N((C) & 0xF8); \
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tft_Write_8N(((C) & 0xE000)>>11 | ((C) & 0x07)<<5); \
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tft_Write_8N(((C) & 0x1F00)>>5)
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// Write 32 bits to TFT
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#define tft_Write_32(C) tft_Write_8N(C>>24); \
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tft_Write_8N(C>>16); \
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tft_Write_8N(C>>8); \
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tft_Write_8N(C)
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// Write two address coordinates
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#define tft_Write_32C(C,D) tft_Write_8N(C>>8); \
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tft_Write_8N(C); \
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tft_Write_8N(D>>8); \
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tft_Write_8N(D)
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// Write same value twice
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#define tft_Write_32D(C) tft_Write_8N(C>>8); \
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tft_Write_8N(C); \
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tft_Write_8N(C>>8); \
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tft_Write_8N(C)
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////////////////////////////////////////////////////////////////////////////////////////
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// Macros to write commands/pixel colour data to other displays
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////////////////////////////////////////////////////////////////////////////////////////
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#else
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#if defined (RPI_DISPLAY_TYPE) // RPi TFT type always needs 16 bit transfers
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#define tft_Write_8(C) spi.transfer(C); spi.transfer(C)
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#define tft_Write_16(C) spi.transfer((uint8_t)((C)>>8));spi.transfer((uint8_t)((C)>>0))
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#define tft_Write_16N(C) spi.transfer((uint8_t)((C)>>8));spi.transfer((uint8_t)((C)>>0))
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#define tft_Write_16S(C) spi.transfer((uint8_t)((C)>>0));spi.transfer((uint8_t)((C)>>8))
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#define tft_Write_32(C) \
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tft_Write_16((uint16_t) ((C)>>16)); \
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tft_Write_16((uint16_t) ((C)>>0))
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#define tft_Write_32C(C,D) \
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spi.transfer(0); spi.transfer((C)>>8); \
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spi.transfer(0); spi.transfer((C)>>0); \
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spi.transfer(0); spi.transfer((D)>>8); \
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spi.transfer(0); spi.transfer((D)>>0)
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#define tft_Write_32D(C) \
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spi.transfer(0); spi.transfer((C)>>8); \
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spi.transfer(0); spi.transfer((C)>>0); \
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spi.transfer(0); spi.transfer((C)>>8); \
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spi.transfer(0); spi.transfer((C)>>0)
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#elif defined (ILI9225_DRIVER) // Needs gaps between commands + data bytes, so use slower transfer functions
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// Warning: these all end in 8 bit SPI mode!
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#define tft_Write_8(C) spi.transfer(C);
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#define tft_Write_16(C) spi.transfer16(C)
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#define tft_Write_16N(C) spi.transfer16(C)
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#define tft_Write_16S(C) spi.transfer16((C)<<8 | (C)>>8)
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#define tft_Write_32(C) spi.transfer16((C)>>16); spi.transfer16(C)
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#define tft_Write_32C(C,D) spi.transfer16(C); spi.transfer16(D)
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#define tft_Write_32D(C) spi.transfer16(C); spi.transfer16(C)
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#else
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// This swaps to 8 bit mode, then back to 16 bit mode
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#define tft_Write_8(C) while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
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hw_write_masked(&spi_get_hw(SPI_X)->cr0, (8 - 1) << SPI_SSPCR0_DSS_LSB, SPI_SSPCR0_DSS_BITS); \
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spi_get_hw(SPI_X)->dr = (uint32_t)(C); \
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while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
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hw_write_masked(&spi_get_hw(SPI_X)->cr0, (16 - 1) << SPI_SSPCR0_DSS_LSB, SPI_SSPCR0_DSS_BITS)
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// Note: the following macros do not wait for the end of transmission
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#define tft_Write_16(C) while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = (uint32_t)(C)
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#define tft_Write_16N(C) while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = (uint32_t)(C)
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#define tft_Write_16S(C) while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = (uint32_t)(C)<<8 | (C)>>8
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#define tft_Write_32(C) spi_get_hw(SPI_X)->dr = (uint32_t)((C)>>16); spi_get_hw(SPI_X)->dr = (uint32_t)(C)
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#define tft_Write_32C(C,D) spi_get_hw(SPI_X)->dr = (uint32_t)(C); spi_get_hw(SPI_X)->dr = (uint32_t)(D)
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#define tft_Write_32D(C) spi_get_hw(SPI_X)->dr = (uint32_t)(C); spi_get_hw(SPI_X)->dr = (uint32_t)(C)
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#endif // RPI_DISPLAY_TYPE
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#endif
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#else // Parallel 8 bit or PIO SPI
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// Wait for the PIO to stall (SM pull request finds no data in TX FIFO)
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// This is used to detect when the SM is idle and hence ready for a jump instruction
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#define WAIT_FOR_STALL tft_pio->fdebug = pull_stall_mask; while (!(tft_pio->fdebug & pull_stall_mask))
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// Wait until at least "S" locations free
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#define WAIT_FOR_FIFO_FREE(S) while (((tft_pio->flevel >> (pio_sm * 8)) & 0x000F) > (8-S)){}
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// Wait until at least 5 locations free
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#define WAIT_FOR_FIFO_5_FREE while ((tft_pio->flevel) & (0x000c << (pio_sm * 8))){}
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// Wait until at least 1 location free
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#define WAIT_FOR_FIFO_1_FREE while ((tft_pio->flevel) & (0x0008 << (pio_sm * 8))){}
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// Wait for FIFO to empty (use before swapping to 8 bits)
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#define WAIT_FOR_FIFO_EMPTY while(!(tft_pio->fstat & (1u << (PIO_FSTAT_TXEMPTY_LSB + pio_sm))))
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// The write register of the TX FIFO.
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#define TX_FIFO tft_pio->txf[pio_sm]
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// Temporary - to be deleted
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#define dir_mask 0
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#if defined (SPI_18BIT_DRIVER) // SPI 18 bit colour
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// This writes 8 bits, then switches back to 16 bit mode automatically
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// Have already waited for pio stalled (last data write complete) when DC switched to command mode
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// The wait for stall allows DC to be changed immediately afterwards
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#define tft_Write_8(C) tft_pio->sm[pio_sm].instr = pio_instr_jmp8; \
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TX_FIFO = (C); \
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WAIT_FOR_STALL
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// Used to send last byte for 32 bit macros below since PIO sends 24 bits
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#define tft_Write_8L(C) WAIT_FOR_STALL; \
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tft_pio->sm[pio_sm].instr = pio_instr_jmp8; \
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TX_FIFO = (C)
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// Note: the following macros do not wait for the end of transmission
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#define tft_Write_16(C) WAIT_FOR_FIFO_FREE(1); TX_FIFO = ((((uint32_t)(C) & 0xF800)<<8) | (((C) & 0x07E0)<<5) | (((C) & 0x001F)<<3))
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#define tft_Write_16N(C) WAIT_FOR_FIFO_FREE(1); TX_FIFO = ((((uint32_t)(C) & 0xF800)<<8) | (((C) & 0x07E0)<<5) | (((C) & 0x001F)<<3))
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#define tft_Write_16S(C) WAIT_FOR_FIFO_FREE(1); TX_FIFO = ((((uint32_t)(C) & 0xF8) << 16) | (((C) & 0xE000)>>3) | (((C) & 0x07)<<13) | (((C) & 0x1F00)>>5))
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#define tft_Write_32(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = ((C)>>8); WAIT_FOR_STALL; tft_Write_8(C)
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#define tft_Write_32C(C,D) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (((C)<<8) | ((D)>>8)); tft_Write_8L(D)
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#define tft_Write_32D(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (((C)<<8) | ((C)>>8)); tft_Write_8L(C)
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#else
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// This writes 8 bits, then switches back to 16 bit mode automatically
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// Have already waited for pio stalled (last data write complete) when DC switched to command mode
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// The wait for stall allows DC to be changed immediately afterwards
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#define tft_Write_8(C) tft_pio->sm[pio_sm].instr = pio_instr_jmp8; \
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TX_FIFO = (C); \
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WAIT_FOR_STALL
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// Note: the following macros do not wait for the end of transmission
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#define tft_Write_16(C) WAIT_FOR_FIFO_FREE(1); TX_FIFO = (C)
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#define tft_Write_16N(C) WAIT_FOR_FIFO_FREE(1); TX_FIFO = (C)
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#define tft_Write_16S(C) WAIT_FOR_FIFO_FREE(1); TX_FIFO = ((C)<<8) | ((C)>>8)
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#define tft_Write_32(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = ((C)>>16); TX_FIFO = (C)
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#define tft_Write_32C(C,D) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (C); TX_FIFO = (D)
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#define tft_Write_32D(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (C); TX_FIFO = (C)
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#endif
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#endif
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#ifndef tft_Write_16N
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#define tft_Write_16N tft_Write_16
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Macros to read from display using SPI or software SPI
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////////////////////////////////////////////////////////////////////////////////////////
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#if !defined (RP2040_PIO_INTERFACE)// SPI
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#if defined (TFT_SDA_READ)
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// Use a bit banged function call for STM32 and bi-directional SDA pin
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#define TFT_eSPI_ENABLE_8_BIT_READ // Enable tft_Read_8(void);
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#define SCLK_L digitalWrite(TFT_SCLK, LOW)
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#define SCLK_H digitalWrite(TFT_SCLK, LOW)
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#else
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// Use a SPI read transfer
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#define tft_Read_8() spi.transfer(0)
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#endif
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#endif
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////////////////////////////////////////////////////////////////////////////////////////
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// Temporary to keep the "Arduino Mbed OS RP2040 Boards" support package happy
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////////////////////////////////////////////////////////////////////////////////////////
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#if defined(ARDUINO_ARCH_RP2040)
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#define ltoa itoa
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#endif
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#endif // Header end
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