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Update TFT_eSPI_RP2040.h

This commit is contained in:
Bodmer 2022-04-23 19:08:16 +01:00
parent 8213f5b19f
commit 8b272a2cef
1 changed files with 9 additions and 4 deletions
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13
Processors/TFT_eSPI_RP2040.h
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@ -399,13 +399,18 @@
#define tft_Write_32D(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (((C)<<8) | ((C)>>8)); tft_Write_8L(C) #define tft_Write_32D(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (((C)<<8) | ((C)>>8)); tft_Write_8L(C)
#else #else // PIO interface, SPI or parallel
// This writes 8 bits, then switches back to 16 bit mode automatically // This writes 8 bits, then switches back to 16 bit mode automatically
// Have already waited for pio stalled (last data write complete) when DC switched to command mode // Have already waited for pio stalled (last data write complete) when DC switched to command mode
// The wait for stall allows DC to be changed immediately afterwards // The wait for stall allows DC to be changed immediately afterwards
#if defined (TFT_PARALLEL_8_BIT) || defined (RP2040_PIO_SPI)
#define tft_Write_8(C) tft_pio->sm[pio_sm].instr = pio_instr_jmp8; \ #define tft_Write_8(C) tft_pio->sm[pio_sm].instr = pio_instr_jmp8; \
TX_FIFO = (C); \ TX_FIFO = (C); \
WAIT_FOR_STALL WAIT_FOR_STALL
#else // For 16 bit parallel 16 bits are always sent
#define tft_Write_8(C) TX_FIFO = (C); \
WAIT_FOR_STALL
#endif
// Note: the following macros do not wait for the end of transmission // Note: the following macros do not wait for the end of transmission