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Update TFT_eSPI_ESP32.h 

fix bug using tft parallel esp32 and uart  togerther
This commit is contained in:
Nguyễn Hồng Thiết 2022-06-30 15:06:02 +07:00 committed by GitHub
parent 23df2a9628
commit 3677a1e430
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1 changed files with 18 additions and 18 deletions
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36
Processors/TFT_eSPI_ESP32.h
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@ -357,7 +357,7 @@ SPI3_HOST = 2
#define clr_mask (dir_mask); WR_L #define clr_mask (dir_mask); WR_L
#elif (TFT_WR >= 0) #elif (TFT_WR >= 0)
// Data bits and the write line are cleared to 0 in one step (1.25x faster) // Data bits and the write line are cleared to 0 in one step (1.25x faster)
#define clr_mask (dir_mask | (1 << TFT_WR)) #define clr_mask2 (dir_mask | (1 << TFT_WR))
#else #else
#define clr_mask #define clr_mask
#endif #endif
@ -371,7 +371,7 @@ SPI3_HOST = 2
//*/ //*/
// Write 8 bits to TFT // Write 8 bits to TFT
#define tft_Write_8(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t)(C)); WR_H #define tft_Write_8(C) GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t)(C)); WR_H
#if defined (SSD1963_DRIVER) #if defined (SSD1963_DRIVER)
@ -391,33 +391,33 @@ SPI3_HOST = 2
#define tft_Write_16S(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H #define tft_Write_16S(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H
#else #else
// Write 16 bits to TFT // Write 16 bits to TFT
#define tft_Write_16(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ #define tft_Write_16(C) GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H
// 16 bit write with swapped bytes // 16 bit write with swapped bytes
#define tft_Write_16S(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \ #define tft_Write_16S(C) GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H
#endif #endif
#endif #endif
// Write 32 bits to TFT // Write 32 bits to TFT
#define tft_Write_32(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 24)); WR_H; \ #define tft_Write_32(C) GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 24)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 16)); WR_H; \ GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 16)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H
// Write two concatenated 16 bit values to TFT // Write two concatenated 16 bit values to TFT
#define tft_Write_32C(C,D) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ #define tft_Write_32C(C,D) GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \ GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 8)); WR_H; \ GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 8)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 0)); WR_H GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 0)); WR_H
// Write 16 bit value twice to TFT - used by drawPixel() // Write 16 bit value twice to TFT - used by drawPixel()
#define tft_Write_32D(C) GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ #define tft_Write_32D(C) GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \ GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \
GPIO.out_w1tc = clr_mask; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H GPIO.out_w1tc = clr_mask2; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H
// Read pin // Read pin
#ifdef TFT_RD #ifdef TFT_RD