Updated Blinker logic to support S2 and C3
Needed to set clk_src to APB, else default is XTAL, which is only 40MHz clock!
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@ -243,7 +243,11 @@ void Blinker::init(int pin, int timerNum){
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conf.intr_type=TIMER_INTR_LEVEL;
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conf.intr_type=TIMER_INTR_LEVEL;
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conf.counter_dir=TIMER_COUNT_UP;
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conf.counter_dir=TIMER_COUNT_UP;
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conf.auto_reload=TIMER_AUTORELOAD_EN;
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conf.auto_reload=TIMER_AUTORELOAD_EN;
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conf.divider=8000; // 80 MHz clock / 8,000 = 10 kHz clock (0.1 ms pulses)
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conf.divider=getApbFrequency()/10000; // set divider to yield 10 kHz clock (0.1 ms pulses)
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#ifdef SOC_TIMER_GROUP_SUPPORT_XTAL // set clock to APB (default is XTAL!) if clk_src is defined in conf structure
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conf.clk_src=TIMER_SRC_CLK_APB;
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#endif
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timer_init(group,idx,&conf);
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timer_init(group,idx,&conf);
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timer_isr_register(group,idx,Blinker::isrTimer,(void *)this,0,NULL);
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timer_isr_register(group,idx,Blinker::isrTimer,(void *)this,0,NULL);
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@ -304,6 +308,7 @@ void Blinker::isrTimer(void *arg){
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}
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}
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timer_set_alarm(b->group,b->idx,TIMER_ALARM_EN);
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timer_set_alarm(b->group,b->idx,TIMER_ALARM_EN);
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}
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}
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//////////////////////////////////////
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//////////////////////////////////////
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